# rvv-intrinsic-doc

**Repository Path**: riscv-mcu/rvv-intrinsic-doc

## Basic Information

- **Project Name**: rvv-intrinsic-doc
- **Description**: No description available
- **Primary Language**: Unknown
- **License**: CC-BY-4.0
- **Default Branch**: eop/remove-misadded-overloaded
- **Homepage**: None
- **GVP Project**: No

## Statistics

- **Stars**: 0
- **Forks**: 0
- **Created**: 2023-09-01
- **Last Updated**: 2024-06-01

## Categories & Tags

**Categories**: Uncategorized

**Tags**: None

## README

# RISC-V Vector Intrinsic Document

Working draft for the RISC-V vector specification are under [doc/](doc/), intrinsic prototypes under
[auto-generated/](auto-generated/) are generated by scripts under [rvv-intrinsic-generator/](rvv-intrinsic-generator/).

Please check out the latest intrinsics specification under
[Releases](https://github.com/riscv-non-isa/rvv-intrinsic-doc/releases).

Upcoming LLVM 17 and GCC trunk supports [v0.12](https://github.com/riscv-non-isa/rvv-intrinsic-doc/releases/tag/v0.12.0), which is
expected to be identical to the to-be-frozen intrinsic specification.

[Clang 16](https://releases.llvm.org/16.0.0/tools/clang/docs/ReleaseNotes.html) and
[GCC 13](https://gcc.gnu.org/gcc-13/changes.html) supports the
[v0.11](https://github.com/riscv-non-isa/rvv-intrinsic-doc/releases/tag/v0.11.1) version, which does not have tuple type
segment load/store intrinsics, fixed-point intrinsics with rounding mode parameter, and floating-point intrinsics
with rounding mdoe parameter.

[The RISC-V Vector C intrinsics TG mailing list](https://lists.riscv.org/g/tech-rvv-intrinsics)

[Monthly meeting Google Doc](https://docs.google.com/document/d/19UucISxO9yuQcQ5S30g7wn2wV5D-1z0fA0GKNVOuktI/edit#)

[Meeting minutes can be found here](https://github.com/riscv-admin/rvv-intrinsics/tree/main)